An FPGA prototype of dual link algorithm for MIMO interference network

Mingda Zhou; Xinming Huang; Yuteng Zhou; Xing Li; Youjian Liu

ICASSP 2017accepted0 citations

An FPGA prototype of dual link algorithm for MIMO interference network

Mingda Zhou, Xinming Huang, Yuteng Zhou, Xing Li, Youjian Liu

Abstract

This paper presents an FPGA-based prototype of the dual link algorithm that maximize the achievable weighted sum rate for MIMO interference network. The iterative algorithm is fast monotone convergent but it must be completed quickly through pilot signaling. Therefore we propose an FPGA-based implementation, targeting software defined radio (SDR) platforms, that is designed to rapidly process the received pilot signals, estimate local channel information, and compute the transmit signal covariance matrices. Compared to its implementation on a CPU, the FPGA implementation is 2 to 4 times faster using fixed-point or floating-point designs.

BibTeX

@inproceedings{icassp2017_anfpgaprototypeo,
  title = {An FPGA prototype of dual link algorithm for MIMO interference network},
  author = {Mingda Zhou and Xinming Huang and Yuteng Zhou and Xing Li and Youjian Liu},
  booktitle = {ICASSP 2017},
  year = {2017}
}