Hardware-friendly LDPC Decoding Scheduling for 5G HARQ Applications
Cing-Yi Liang, Mao-Ruei Li, Huang-Chang Lee, Hsin-Yu Lee, Yeong-Luh Ueng
Abstract
This paper presents hardware-friendly LDPC decoding schedules for 5G hybrid automatic repeat request (HARQ) applications. Since there are built-in punctured blocks in the parity check matrix (PCM), a scheduling technique is proposed that allows the punctured nodes to be efficiently recovered. For HARQ using the Chase combining (CC), the previous decoding results corresponding to the punctured part are retained, and the proposed layered decoding is arranged according to the row weight. For HARQ using the incremental redundancy (IR) approach, the parity bits corresponding to the pure-row-orthogonal part of the PCM are transmitted first. The hardware implementation shows that the throughput can be increased by 21.37% for the first decoding attempt, 56.9% for CC-HARQ and 14.51% for IR-HARQ when the code rate reaches 0.303.
BibTeX
@inproceedings{icassp2019_hardwarefriendly,
title = {Hardware-friendly LDPC Decoding Scheduling for 5G HARQ Applications},
author = {Cing-Yi Liang and Mao-Ruei Li and Huang-Chang Lee and Hsin-Yu Lee and Yeong-Luh Ueng},
booktitle = {ICASSP 2019},
year = {2019}
}