2023
Towards a Comprehensive Benchmark for High-Level Synthesis Targeted to FPGAs
NeurIPS 2023poster
High-level synthesis (HLS) aims to raise the abstraction layer in hardware design, enabling the design of domain-specific accelerators (DSAs) like field-programmable gate arrays (FPGAs) using C/C++ instead of hardware description languages (HDLs). Compiler directives in the form of pragmas play a cr…