Jarno Vanne

2 accepted papers

2023

RDO Candidate Selection for Maximizing Coding Efficiency in a Practical HEVC Encoder

Joose Sainio, Alexandre Mercat, Jarno Vanne

ICASSP 2023accepted

High Efficiency Video Coding (HEVC) creates the conditions for economic video transmission and storage but making most of its compression potential calls for effective rate-distortion optimization (RDO) techniques in practical HEVC encoders. This paper explores the effectiveness of the following uni…

Cited by 0 Source ↗Scholar ↗

2017

High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA

Panu Sjovall, Vili Viitamäki, Jarno Vanne, Timo D. Hämäläinen

ICASSP 2017accepted

This paper presents the first known high-level synthesis (HLS) implementation of integer discrete cosine transform (DCT) and discrete sine transform (DST) for High Efficiency Video Coding (HEVC). The proposed approach implements these 2-D transforms by two successive 1-D transforms using a well-know…

Cited by 0 Source ↗Scholar ↗