2017
High-level synthesis implementation of HEVC 2-D DCT/DST on FPGA
ICASSP 2017accepted
This paper presents the first known high-level synthesis (HLS) implementation of integer discrete cosine transform (DCT) and discrete sine transform (DST) for High Efficiency Video Coding (HEVC). The proposed approach implements these 2-D transforms by two successive 1-D transforms using a well-know…