2015
An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks
ICASSP 2015accepted
In this paper, an energy efficient, memory-intensive, and high throughput VLSI architecture is proposed for convolutional networks (C-Net) by employing compute memory (CM) [1], where computation is deeply embedded into the memory (SRAM). Behavioral models incorporating CM's circuit non-idealities an…