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Zhihai Wang

17 accepted papers

2026

Evolving Graph Structured Programs for Circuit Generation with Large Language Models

ICLR 2026poster

Logic synthesis (LS), which aims to generate a *compact* logic circuit graph with minimized size while *accurately* satisfying a given functionality, plays an important role in chip design. However, existing LS methods struggle to balance circuit structure compactness and functional accuracy, often…

Cited by 0SourceScholar
2026

Short Chains, Deep Thoughts: Balancing Reasoning Efficiency and Intra-Segment Capability via Split-Merge Optimization

ICML 2026poster

While Large Reasoning Models (LRMs) have demonstrated impressive capabilities in solving complex tasks through the generation of long reasoning chains, this reliance on verbose generation results in significant latency and computational overhead. To address these challenges, we propose \textbf{CoSMo…

Cited by 0SourceScholar
2025

A Graph Enhanced Symbolic Discovery Framework For Efficient Logic Optimization

ICLR 2025poster

The efficiency of Logic Optimization (LO) has become one of the key bottlenecks in chip design. To prompt efficient LO, previous studies propose using a key scoring function to predict and prune a large number of ineffective nodes of the LO heuristics. However, the existing scoring functions struggl…

Cited by 0SourcePDFScholar
2025

Accelerating Large Language Model Reasoning via Speculative Search

ICML 2025poster

Tree-search-based reasoning methods have significantly enhanced the reasoning capability of large language models (LLMs) by facilitating the exploration of multiple intermediate reasoning steps, i.e., thoughts. However, these methods suffer from substantial inference latency, as they have to generat…

Cited by 0SourcePDFScholar
2025

AttentionPredictor: Temporal Patterns Matter for KV Cache Compression

NeurIPS 2025poster

With the development of large language models (LLMs), efficient inference through Key-Value (KV) cache compression has attracted considerable attention, especially for long-context generation. To compress the KV cache, recent methods identify critical KV tokens through static modeling of attention s…

Cited by 0SourcecodeScholar
2025

Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithms

NeurIPS 2025poster

Chip placement is a critical step in the Electronic Design Automation (EDA) workflow, which aims to arrange chip modules on the canvas to optimize the performance, power, and area (PPA) metrics of final designs. Recent advances show great potential of AI-based algorithms in chip placement. However,…

Cited by 0SourceScholar
2025

Computing Circuits Optimization via Model-Based Circuit Genetic Evolution

ICLR 2025poster

Optimizing computing circuits such as multipliers and adders is a fundamental challenge in modern integrated circuit design. Recent efforts propose formulating this optimization problem as a reinforcement learning (RL) proxy task, offering a promising approach to search high-speed and area-efficient…

Cited by 4SourcePDFScholar
2025

Dynamic Configuration for Cutting Plane Separators via Reinforcement Learning on Incremental Graph

NeurIPS 2025poster

Cutting planes (cuts) are essential for solving mixed-integer linear programming (MILP) problems, as they tighten the feasible solution space and accelerate the solving process. Modern MILP solvers offer diverse cutting plane separators to generate cuts, enabling users to leverage their potential co…

Cited by 0SourceScholar
2025

High-Performance Arithmetic Circuit Optimization via Differentiable Architecture Search

NeurIPS 2025spotlight

Arithmetic circuit optimization remains a fundamental challenge in modern integrated circuit design. Recent advances have cast this problem within the Learning to Optimize (L2O) paradigm, where intelligent agents autonomously explore high-performance design spaces with encouraging results. However,…

Cited by 0SourceScholar
2025

HyperTree Planning: Enhancing LLM Reasoning via Hierarchical Thinking

ICML 2025poster

Recent advancements have significantly enhanced the performance of large language models (LLMs) in tackling complex reasoning tasks, achieving notable success in domains like mathematical and logical reasoning. However, these methods encounter challenges with complex planning tasks, primarily due to…

Cited by 0SourcePDFScholar
2024

A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design

ICML 2024spotlight

Logic Synthesis (LS) plays a vital role in chip design. A key task in LS is to simplify circuits---modeled by directed acyclic graphs (DAGs)---with functionality-equivalent transformations. To tackle this task, many LS heuristics apply transformations to subgraphs---rooted at each node on an input D…

2024

A Hierarchical Adaptive Multi-Task Reinforcement Learning Framework for Multiplier Circuit Design

ICML 2024poster

Multiplier design---which aims to explore a large combinatorial design space to simultaneously optimize multiple conflicting objectives---is a fundamental problem in the integrated circuits industry. Although traditional approaches tackle the multi-objective multiplier optimization problem by manual…

Cited by 17SourcePDFScholar
2024

Learning to Stop Cut Generation for Efficient Mixed-Integer Linear Programming

AAAI 2024technical

Cutting planes (cuts) play an important role in solving mixed-integer linear programs (MILPs), as they significantly tighten the dual bounds and improve the solving performance. A key problem for cuts is when to stop cuts generation, which is important for the efficiency of solving MILPs. However, m…

Cited by 9SourcePDFScholar
2024

Towards Next-Generation Logic Synthesis: A Scalable Neural Circuit Generation Framework

NeurIPS 2024poster

Logic Synthesis (LS) aims to generate an optimized logic circuit satisfying a given functionality, which generally consists of circuit translation and optimization. It is a challenging and fundamental combinatorial optimization problem in integrated circuit design. Traditional LS approaches rely on…

Cited by 5SourcePDFScholar
2023

Efficient Exploration in Resource-Restricted Reinforcement Learning

AAAI 2023technical

In many real-world applications of reinforcement learning (RL), performing actions requires consuming certain types of resources that are non-replenishable in each episode. Typical applications include robotic control with limited energy and video games with consumable items. In tasks with non-reple…

Cited by 18SourcePDFScholar
2023

Learning Cut Selection for Mixed-Integer Linear Programming via Hierarchical Sequence Model

ICLR 2023poster

Cutting planes (cuts) are important for solving mixed-integer linear programs (MILPs), which formulate a wide range of important real-world applications. Cut selection---which aims to select a proper subset of the candidate cuts to improve the efficiency of solving MILPs---heavily depends on (P1) wh…

Cited by 62SourcePDFScholar
2022

Sample-Efficient Reinforcement Learning via Conservative Model-Based Actor-Critic

AAAI 2022technical

Model-based reinforcement learning algorithms, which aim to learn a model of the environment to make decisions, are more sample efficient than their model-free counterparts. The sample efficiency of model-based approaches relies on whether the model can well approximate the environment. However, lea…

Cited by 45SourcePDFScholar